Role Overview We are seeking a highly experienced Design Verification Architect to lead the definition and execution of scalable, reusable, high‑quality verification strategies for next‑generation SoCs targeting AI, HPC, and networking applications. Define and enforce verification quality metrics, coverage closure strategies, and sign‑off criteria. 12+ years of experience in Design Verification, with significant exposure to large SoC verification. Experience with AI/ML applications in verification workflows. High degree of verification reuse across programs.
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