You will build the executable model of the chip before silicon exists. Your reference models will become the golden checkers the verification team scores against, and the platform will run real firmware months ahead of RTL. This is a founding, critical-path role: the virtual platform is what unblocks the firmware and architecture work in parallel with design. Built or led a virtual platform / ESL model that real firmware ran on for pre-silicon bring-up. High-throughput datapath modelling.
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