As the Hardware Lead, you will serve as the technical cornerstone driving the architecture and implementation of Reconceive’s next-generation analog MAC IP and custom memory. In this cross-functional leadership role, you will operate seamlessly across transistor-level circuit design, physical silicon characterization, and system-level architecture. This role will interface closely with our AI team to co-develop model training capabilities and drive the adoption of AI-enabled automation across the design lifecycle. Champion advanced Design-for-Manufacturing (DFM) practices to aggressively mitigate variation, mismatch, and parasitic challenges inherent to highly optimized mixed-signal compute.Custom Memory Leadership: Lead the end-to-end architecture, design, and layout optimization of custom, highly efficient SRAM tailored for low-power, high-throughput AI acceleration.Data Converter Design: Architect high-performance, ultra-low-power data converters (with a strong emphasis on SAR ADCs) and switched-capacitor circuits optimized for stringent system-level power and area constraints.Behavioral Modeling & Algorithmic Co-Design: Build and maintain high-fidelity behavioral models of the physical hardware. Must demonstrate a first-principles mastery of device physics, variation mitigation, mismatch analysis, and rigorous DFM methodologies, with a proven track record of successful tape-outs in commercial CMOS processes.Custom SRAM (Mandatory): Extensive, demonstrable experience in the design, layout supervision, and silicon-proven implementation of custom, high-performance SRAM arrays.Data Converters: Deep expertise designing energy-efficient data converters (with a strong emphasis on SAR ADCs, though experience with algorithmic or pipelined topologies is highly valued) and switched-capacitor circuits.Data & Automation Proficiency: proficiency in Python and/or MATLAB.
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