May 25, 2026

Principal / Director of Analog & Mixed-Signal IC Architecture

(re)conceive ai Santa Rosa, California

We are seeking a dynamic Hardware Lead to be the technical cornerstone in shaping the architecture and execution of Reconceive's cutting-edge analog MAC IP and custom memory solutions. In this pivotal leadership role, you will expertly navigate the intersections of transistor-level circuit design, physical silicon analysis, and overarching system architecture. Your responsibilities will include the development of highly optimized custom hardware utilizing established commercial CMOS technologies, as well as creating efficient automated pipelines that integrate empirical silicon data with behavioral models to enable ongoing post-silicon refinements. Promote advanced Design-for-Manufacturing (DFM) methodologies to proactively address challenges related to variation, mismatch, and parasitic issues in mixed-signal compute.Custom Memory Leadership: Oversee the entire process of architecture, design, and layout optimization for efficient SRAM designed for low-power, high-throughput AI applications.Data Converter Design: Design high-performance, ultra-low-power data converters, focusing particularly on SAR ADCs and switched-capacitor circuits that meet rigorous power and area constraints.Behavioral Modeling & Algorithmic Co-Design: Develop and maintain accurate behavioral models of physical hardware and provide essential feedback to systems teams for hardware-aware exploration.Post-Silicon Characterization & Calibration: Create comprehensive characterization protocols and develop automated pipelines (using Python/MATLAB) in partnership with our SW/AI team to correlate physical silicon data with behavioral models, ensuring precision in post-silicon analysis.Silicon Lifecycle Ownership: Execute detailed feasibility studies to confirm performance, supervise third-party IP integration, and facilitate chip bring-up and system-level debugging.Mentorship & Organization Building: Guide layout teams in best practices for parasitic mitigation and device matching. Proven record of leading complex mixed-signal/analog designs to volume production.Foundational Analog Mastery: In-depth practical knowledge in system and circuit design, demonstrating mastery over device physics, variation mitigation, mismatch analysis, and DFM practices, with successful tape-outs in commercial CMOS processes.Custom SRAM: Significant experience in the design, layout supervision, and silicon-proven implementation of high-performance custom SRAM arrays.Data Converters: Expertise in designing energy-efficient data converters, especially SAR ADCs, with additional value placed on experience with algorithmic or pipelined architectures.Data & Automation Proficiency: Proficient in Python and/or MATLAB, with a track record of developing automated characterization pipelines to extract, process, and correlate silicon data with high-level system models.Analog & Digital Design: Extensive experience in designing key analog functions (filters, op-amps, bias circuits, oscillators) and custom digital logic with high speed and low power consumption.EDA Tool Mastery: Expertise in industry-standard IC design and verification tools (e.g., Cadence Virtuoso, Siemens EDA / Calibre, SPICE/FastSPICE simulators).Startup Mindset: Capable of performing in a fast-paced, dynamic environment; readiness to take initiative, assume multiple roles, and drive execution while establishing a scalable hardware team.Reliability: Strong knowledge of ESD, EMIR, and device lifetime reliability issues and practical design solutions.Preferred Qualifications:

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