SoC Design Architect

The Oho Group have partnered with an exciting GPU startup in the AI space looking for a Senior SoC Designer to lead frontend RTL design for next-generation AI acceleration systems.

Responsibilities

Develop and optimize RTL for AI centric hardware subsystemsImplement micro-architectures focused on datapaths, memory, and performanceDrive PPA optimization across frequency, power, and area targetsLead synthesis, timing closure, and frontend verificationCollaborate with architecture teams on HW/SW co-optimization for AI workloads

Requirements

5+ years in silicon/ASIC frontend designStrong RTL expertise in Verilog/SystemVerilogExperience with synthesis, timing analysis, verification, and power optimizationDeep understanding of PPA trade-offs and memory bandwidth optimization (SRAM)Proficiency with EDA tools including Verilator, Yosys, and OpenSTA

Preferred

AI accelerator or NPU design experienceML-for-EDA or AI-assisted hardware optimization backgroundEdge AI or automotive safety familiarity