SoC Design Architect

Responsibilities Develop and optimize RTL for AI centric hardware subsystemsImplement micro-architectures focused on datapaths, memory, and performanceDrive PPA optimization across frequency, power, and area targetsLead synthesis, timing closure, and frontend verificationCollaborate with architecture teams on HW/SW co-optimization for AI workloads Requirements Preferred AI accelerator or NPU design experienceML-for-EDA or AI-assisted hardware optimization backgroundEdge AI or automotive safety familiarity

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